Take note that the memory isn't dual channel, the platform is. In fact there is no such thing as dual channel memory. Rather, it is a memory interface composed of two (or more) normal memory modules coordinated by the chipset on the motherboard, or in the case of the Athlon64 FX and Opteron processors, coordinated by the integrated memory controller. But for the sake of simplicity, we refer to DDR dual channel architecture as dual channel memory.
The nforce2 platform has two 64bit memory controllers (which are independent of each other) instead of just a single controller like other chipsets. These two controllers are able to access "two channels" of memory simultaneously. The two channels, together, handle memory operations more efficiently than one module by utilizing the bandwidth of two modules (or more) combined. By combining DDR400 (PC3200) with dual memory controllers, the nForce2 could offer up to 6.4GB/sec of bandwidth in theory. It is also possible for DDR Dual Channel architecture to reduce system latencies and timing delays that inherently occur with one memory module. For example, one controller reads and writes data while the second controller prepares for the next access, hence, eliminating the reset and setup delays that occur before one memory module can begin the read/write process all over again. Think of it like two relay runners. The first runner runs one leg while the second runner sets up and prepares to receive the baton smoothly and carry on the task at hand without delay.
However, this extra bandwidth produced by dual channel cannot be fully utilized by the Athlon XP and Duron family (K7) of processors. The system bus on an Athlon XP doesn'tt know the difference between Dual Channel and a TV Channel. Data(bandwidth) will reach these processors no sooner than the system bus (FSB) allows them, and the processor therefore largely cannot derive an advantage from memory operating faster than DDR266 when operating on a 133/266Mhz FSB, DDR333 with a 166/333Mhz FSB or DDR400 at 200/400Mhz FSB even in single channel mode. Visualize a four lane highway, symbolizing your Dual Channel configuration. As you go along the highway you come up to a bridge that is only 2 lanes wide. That bridge is the restriction posed by the dual-pumped AMD FSB. Only two lanes of traffic may pass through the bridge at any one time. That's the way it is, with the K7 processors and Dual Channel chipsets. In case you're wondering, the K in K7 stands for Kryptonite, later changed to Krypton to avoid copyright infringement. Yes, that very same fictional element from comic books that could bring the otherwise all-powerful Superman (Intel ) to his knees. Cool eh? how K endured in the names of various AMD chips for several years and even in the ones to come.
Intel's P4 architecture, in contrast, is designed to exploit the increased bandwidth afforded by dual channel memory architectures. The quad pumped P4 FSB seemed like drastic overkill in the days of single channel SDR memory, but is paying handsome dividends in today's climate of dual channel DDR memory subsystems. This is one lasting and productive legacy of Intel's RDRAM efforts. As implemented on the P4 RDRAM was also dual channel architecture, and mandated the quad-pumped FSB for its extra bandwidth to be exploited. This factor continues to serve the P4 well in the dual channel DDR era we are currently in, and allows P4's greater memory performance than all other PC platforms, save the new AMD Athlon 64 FX with all its new bells and whistles.
The Athlon 64 FX processor has a fully integrated DDR Dual Channel memory controller providing a 128-bit wide path to memory and therefore eliminating the need for a Dual Channel interface on the motherboard which traditionally was always located in the northbridge. Although the P4 (800fsb variety) and the A64 FX, both share the same theoretical peak memory bandwidth of 6.4GB/sec, the Athlon FX realizes significantly more throughput due mainly to its integrated memory controller. Even so, it still suffers from the required use of registered modules which are slower than regular modules, in terms of subsystem latency. The upcoming Athlon 64 / A64 FX processors designed for Socket 939 will be free from this major drawback and will also feature Dual Channel memory controllers.
Source : http://www.dslreports.com/faq/9216
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